http://www.cnr.it/ontology/cnr/individuo/prodotto/ID36884
Single-Pole Double-THRU and True Time Delay Lines in Alumina Packaging based on RF MEMS Switches in Silicon Technology (Articolo in rivista)
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- Single-Pole Double-THRU and True Time Delay Lines in Alumina Packaging based on RF MEMS Switches in Silicon Technology (Articolo in rivista) (literal)
- Anno
- 2009-01-01T00:00:00+01:00 (literal)
- Alternative label
De Angelis G, Lucibello A, Marcelli R, Catoni S, Lanciano A, Buttiglione R, Dispenza M, Giacomozzi F, Margesin B, Maglione A, Erspan M, Combi C (2009)
Single-Pole Double-THRU and True Time Delay Lines in Alumina Packaging based on RF MEMS Switches in Silicon Technology
in Romanian Journal of Information Science and Technology
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- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
- De Angelis G, Lucibello A, Marcelli R, Catoni S, Lanciano A, Buttiglione R, Dispenza M, Giacomozzi F, Margesin B, Maglione A, Erspan M, Combi C (literal)
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- a CNR-IMM Roma, Via del Fosso del Cavaliere 100, 00133 Roma, Italy
b SELEX-SI, Via Tiburtina km 12.400, 00131 Roma, Italy
c FBK-irst, Via Sommarive 18, I-38100, Povo (TN), Italy
d OPTOI, Via Vienna 8, I-38100 Gardolo (TN), Italy
e ST Microelectronics, Milano, Italy (literal)
- Titolo
- Single-Pole Double-THRU and True Time Delay Lines in Alumina Packaging based on RF MEMS Switches in Silicon Technology (literal)
- Abstract
- Packaged MEMS devices for RF applications have been modelled,
realized and tested. In particular, RF MEMS single ohmic series switches
have been obtained on silicon high resistivity substrates and they have been
integrated in alumina packages to get single-pole-double-thru (SPDT) and truetime-delay-line
(TTDL) con¯gurations. For this purpose, the individual switches
have been considered as the building blocks of more complicated structures, and
the alumina substrate has been properly tailored in order to get the best electrical
performances considering all the technological steps necessary for the final hybrid device. Actually, several parameters and processes have been considered
for such an optimization, involving the geometry, the wire bonding and the
cover to be used. Test structures with technologically actuated switches have
been also manufactured in order to have the best reference result for the proposed
structures. After that, the same devices have been packaged for the ¯nal
test. As a result, TTDLs for wide band operation, speci¯cally designed for the
(6{18) GHz band, have been obtained, with insertion losses less than 2 dB up to
14 GHz for the short path and 3 dB for the long path (5 dB for the real device),
and delay times in the order of 0.3{0.4 ns for the short path and 0.5{0.6 ns for
the long path. The maximum di®erential delay time is in the order of 0.2 ns. (literal)
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