Single electron effects and structural effects in ultrascaled silicon nanocrystal floating-gate memories (Articolo in rivista)

Type
Label
  • Single electron effects and structural effects in ultrascaled silicon nanocrystal floating-gate memories (Articolo in rivista) (literal)
Anno
  • 2004-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1109/TNANO.2004.824016 (literal)
Alternative label
  • Molas, G; De Salvo, B; Ghibaudo, G; Mariolle, D; Toffoli, A; Buffet, N; Puglisi, R; Lombardo, S; Deleonibus, S (2004)
    Single electron effects and structural effects in ultrascaled silicon nanocrystal floating-gate memories
    in IEEE transactions on nanotechnology
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Molas, G; De Salvo, B; Ghibaudo, G; Mariolle, D; Toffoli, A; Buffet, N; Puglisi, R; Lombardo, S; Deleonibus, S (literal)
Pagina inizio
  • 42 (literal)
Pagina fine
  • 48 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#url
  • http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=1278267&contentType=Journals+%26+Magazines&matchBoolean%3Dtrue%26searchField%3DSearch_All%26queryText%3D%28%28%28p_Authors%3AMolas%29+AND+p_Authors%3ALombardo%29+AND+2004%29 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 3 (literal)
Rivista
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • CEA, LETI, Grenoble 9, France; CNRS, INPG, IMEP, Grenoble 9, France; CNR, IMM, I-95121 Catania, Italy (literal)
Titolo
  • Single electron effects and structural effects in ultrascaled silicon nanocrystal floating-gate memories (literal)
Abstract
  • In this paper, we present a nanometer-sized floating-gate memory device, fabricated on silicon-on-insulator substrate and using silicon nanocrystals as storage nodes. Single electron charging and discharging phenomena occurring at room temperature will be demonstrated and discussed by means of simple analytical models. A deeper investigation of the impact of critical dimensions of the memory cell (i.e., active area and channel width and length) on the device operation (in particular, memory programming window), performed on a large number of samples, will be reported. Qualitative explanations for the observed experimental behaviors will be given. (literal)
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