http://www.cnr.it/ontology/cnr/individuo/prodotto/ID35446
Percolation path and dielectric-breakdown-induced-epitaxy evolution during ultrathin gate dielectric breakdown transient (Articolo in rivista)
- Type
- Label
- Percolation path and dielectric-breakdown-induced-epitaxy evolution during ultrathin gate dielectric breakdown transient (Articolo in rivista) (literal)
- Anno
- 2003-01-01T00:00:00+01:00 (literal)
- Alternative label
Tung C.H., Pey K.L., Tang L.J., Radhakrishnan M.K., Lin W.H., Palumbo F., Lombardo S. (2003)
Percolation path and dielectric-breakdown-induced-epitaxy evolution during ultrathin gate dielectric breakdown transient
in Applied physics letters
(literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
- Tung C.H., Pey K.L., Tang L.J., Radhakrishnan M.K., Lin W.H., Palumbo F., Lombardo S. (literal)
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- Rivista
- Note
- ISI Web of Science (WOS) (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
- Inst Microelect, Singapore 117685, Singapore; Nanyang Technol Univ, Sch EEE, Singapore 639798, Singapore; Philips Elect, CFT, Singapore 319762, Singapore; Chartered Semicond Mfg Ltd, Dept Technol Dev, Singapore 738406, Singapore; CNR, IMM, Sez Catania, I-95121 Catania, Italy (literal)
- Titolo
- Percolation path and dielectric-breakdown-induced-epitaxy evolution during ultrathin gate dielectric breakdown transient (literal)
- Abstract
- A physical model has been developed which complies with the experimental observation on the failure mechanism of ultrathin gate oxide breakdown during constant voltage stress. Dynamic equilibrium needs to be established between the percolation conductive path and the dielectric breakdown induced epitaxy (DBIE) formation during gate dielectric breakdown transient. The model is capable of linking the percolation model, soft breakdown, and hard breakdown to the DBIE growth for a variety of stress conditions and gate oxide thickness without involving new empirical parameters. (literal)
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