Design and FPGA implementation of an all-digital two-quadrant general pulse-width modulator (Contributo in atti di convegno)

Type
Label
  • Design and FPGA implementation of an all-digital two-quadrant general pulse-width modulator (Contributo in atti di convegno) (literal)
Anno
  • 2014-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1109/ISIE.2014.6864807 (literal)
Alternative label
  • Di Piazza M.C.; Luna M.; Vitale G. (2014)
    Design and FPGA implementation of an all-digital two-quadrant general pulse-width modulator
    in IEEE 23rd International Symposium on Industrial Electronics (ISIE), 2014, Istanbul (Turkey), 1-4 June 2014
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Di Piazza M.C.; Luna M.; Vitale G. (literal)
Pagina inizio
  • 1328 (literal)
Pagina fine
  • 1335 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#url
  • http://www.scopus.com/inward/record.url?eid=2-s2.0-84907346121&partnerID=q2rCbXpz (literal)
Note
  • Scopu (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • Consiglio Nazionale Delle Ricerche (CNR), Istituto di Studi sui Sistemi Intelligenti per l'Automazione (ISSIA), via Dante, 12 90141 Palermo, Italy (literal)
Titolo
  • Design and FPGA implementation of an all-digital two-quadrant general pulse-width modulator (literal)
Abstract
  • This paper proposes an all-digital general pulse-width modulator (ADGPWM) that is an improvement of the general pulse-width modulator (GPWM). The ADGPWM allows overmodulation and negative carrier and reference signals to be managed. The proposed all-digital implementation is suited both to serial/concurrent data processing platforms and to integrated circuit implementation, to realize several control algorithms for switching power converters. The VHDL design of the ADGPWM is synthesized and tested on a board which is based on a commercial field-programmable-gate-Array (FPGA). Several details of the all-digital implementation are discussed thoroughly and experimental results are given in order to assess its validity. © 2014 IEEE. (literal)
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