Wet oxidation of nitride layer implanted with low-energy Si ions for improved oxide-nitride-oxide memory stacks (Articolo in rivista)

Type
Label
  • Wet oxidation of nitride layer implanted with low-energy Si ions for improved oxide-nitride-oxide memory stacks (Articolo in rivista) (literal)
Anno
  • 2007-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1063/1.2752769 (literal)
Alternative label
  • Ioannou-Sougleridis, V; Dimitrakis, P; Vamvakas, VE; Normand, P; Bonafos, C; Schamm, S; Cherkashin, N; Ben Assayag, G; Perego, M; Fanciulli, M (2007)
    Wet oxidation of nitride layer implanted with low-energy Si ions for improved oxide-nitride-oxide memory stacks
    in Applied physics letters
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Ioannou-Sougleridis, V; Dimitrakis, P; Vamvakas, VE; Normand, P; Bonafos, C; Schamm, S; Cherkashin, N; Ben Assayag, G; Perego, M; Fanciulli, M (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 90 (literal)
Rivista
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • NCSR Demokritos, Inst Microelect, Aghia Paraskevi 15310, Greece; CNRS, CEMES, F-31055 Toulouse, France; CNR, INFM, MDM, I-20041 Milan, Italy (literal)
Titolo
  • Wet oxidation of nitride layer implanted with low-energy Si ions for improved oxide-nitride-oxide memory stacks (literal)
Abstract
  • An alternative method for the formation of the top oxide in oxide-nitride-oxide dielectric stacks is proposed. This method combines low-energy (1 keV) silicon ion implantation into a thin nitride-oxide stack and subsequent low-temperature wet oxidation (850 degrees C for 15 min). Transmission electron microscopy shows that for an implanted dose of 1.5x10(16) Si cm(-2), an 8-nm-thick silicon oxide layer develops on the surface of the nitride-oxide stack. Time of flight secondary ion mass spectrometry reveals: (1) transformation of the implanted silicon nitride to an oxygen-rich-silicon nitride layer and (2) pilling up of nitrogen atoms at the bottom silicon/oxide-substrate interface. The resulting oxide-nitride-oxide stack exhibits strong charge storage effects and excellent charge retention properties leading to a 1.5 V, 10 yr extrapolated memory window at 125 degrees C. These results suggest that the proposed fabrication route may lead to gate dielectric stacks of substantial potential impact for mainstream nitride-based memory devices. (c) 2007 American Institute of Physics. (literal)
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