http://www.cnr.it/ontology/cnr/individuo/prodotto/ID65795
C-V and DLTS analyses of trap-induced graded junctions: the case of Al+ implanted JTE p+n 4H-SiC diodes. (Articolo in rivista)
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- Label
- C-V and DLTS analyses of trap-induced graded junctions: the case of Al+ implanted JTE p+n 4H-SiC diodes. (Articolo in rivista) (literal)
- Anno
- 2009-01-01T00:00:00+01:00 (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
- 10.4028/www.scientific.net/MSF.615-617.469 (literal)
- Alternative label
Fabbri F, Moscatelli F, Poggi A, Nipoti R, Cavallini A (2009)
C-V and DLTS analyses of trap-induced graded junctions: the case of Al+ implanted JTE p+n 4H-SiC diodes.
in Materials science forum; TRANS TECH PUBLICATIONS LTD, LAUBLSRUTISTR 24, CH-8717 STAFA-ZURICH (Svizzera)
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- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
- Fabbri F, Moscatelli F, Poggi A, Nipoti R, Cavallini A (literal)
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- Congresso data SEP 07-11, 2008
Congresso luogo Barcelona, SPAIN
Congresso nome 7th European Conference on Silicon Carbide and Related Materials
Congresso relazione Contributo
Congresso rilevanza Internazionale
Curatore/i del volume PerezTomas, A; Godignon, P; Vellvehi, M; Brosselard, P
Titolo del volume SILICON CARBIDE AND RELATED MATERIALS 2008 (literal)
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- http://www.scientific.net/MSF.615-617.469 (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#titoloVolume
- SILICON CARBIDE AND RELATED MATERIALS 2008 (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
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- ISI Web of Science (WOS) (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
- Phos Lab, Università degli Studi di Bologna, viale Berti Pichat 6/2, 40127 Bologna, Italy
CNR-IMM of Bologna, via Gobetti 101, 40129 Bologna, Italy (literal)
- Titolo
- C-V and DLTS analyses of trap-induced graded junctions: the case of Al+ implanted JTE p+n 4H-SiC diodes. (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#curatoriVolume
- PerezTomas, A; Godignon, P; Vellvehi, M; Brosselard, P (literal)
- Abstract
- Capacitance versus Voltage (C-V) and Deep Level Transient Spectroscopy (DLTS) measurements of Al+ implanted p+n diodes with Al+ implanted Junction Termination Extension are here studied. These diodes present C-V characteristics like graded junction for low forward bias values, i.e. > 0.4 V , or like abrupt junctions for large reverse bias, i.e. between 0.4V and -10V. The depth range of the graded junction, computed by the capacitance values, is much larger than the simulated tail of the ion implanted Al+ profile. DLTS spectra have been measured both in injection and standard configuration and always show minority carrier traps in the temperature range 0-300K. Three are the minority carrier related peaks, one attributed to the Al acceptor and the others to the D and D1 defects. The depth distribution of these hole traps will be discussed with respect to the apparent carrier concentration, obtained by C-V analysis. (literal)
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