Characterization of Phosphorus Implanted n+/p Junctions Integrated as Source/drain Regions in a 4H-SiC n-MOSFET (Articolo in rivista)

Type
Label
  • Characterization of Phosphorus Implanted n+/p Junctions Integrated as Source/drain Regions in a 4H-SiC n-MOSFET (Articolo in rivista) (literal)
Anno
  • 2009-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.4028/www.scientific.net/MSF.615-617.687 (literal)
Alternative label
  • Moscatelli F, Nipoti R, Poggi A, Solmi S, Cristiani S, Sanmartin M (2009)
    Characterization of Phosphorus Implanted n+/p Junctions Integrated as Source/drain Regions in a 4H-SiC n-MOSFET
    in Materials science forum; TRANS TECH PUBLICATIONS LTD, LAUBLSRUTISTR 24, CH-8717 STAFA-ZURICH (Svizzera)
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Moscatelli F, Nipoti R, Poggi A, Solmi S, Cristiani S, Sanmartin M (literal)
Pagina inizio
  • 687 (literal)
Pagina fine
  • 690 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#altreInformazioni
  • Congresso data SEP 07-11, 2008 Congresso luogo Barcelona, SPAIN Congresso nome 7th European Conference on Silicon Carbide and Related Materials Congresso relazione Contributo Congresso rilevanza Internazionale Curatore/i del volume Amador Pérez-Tomás, Philippe Godignon, Miquel Vellvehí and Pierre Brosselard Titolo del volume Silicon Carbide and Related Materials 2008 (literal)
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  • http://www.scientific.net/MSF.615-617.687 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#titoloVolume
  • Silicon Carbide and Related Materials 2008 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 615-617 (literal)
Rivista
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • CNR- IMM of Bologna, via Gobetti 101, 40129 Bologna. Italy (literal)
Titolo
  • Characterization of Phosphorus Implanted n+/p Junctions Integrated as Source/drain Regions in a 4H-SiC n-MOSFET (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#curatoriVolume
  • Amador Pérez-Tomás, Philippe Godignon, Miquel Vellvehí and Pierre Brosselard (literal)
Abstract
  • Phosphorous implanted n+/p diodes have been included in the masks for manufacturing n-MOSFET devices and processed in the same way of source/drain regions. The diode junctions were made by a P+ implantation at 300°C and a post implantation annealing at 1300°C. The diode emitter area was protected by 0.6 micron thick CVD oxide during the processing of the MOSFET gate oxide. Three gate oxide processes were taken into account: two of them include a N implantation before a wet oxidation, while the third one was a standard oxidation. Considering the effect on the n+/p diodes, the main difference among these were the wet thermal oxidation time that ranged between 180 and 480 min at a temperature of 1100°C. The diode current-voltage characteristics show similar forward but different reverse curves in the temperature range of 25-290°C. Differences in reverse bias voltage as a function of the measurement temperature have been analyzed and are related to the different gate oxidation time. A correlation between the shortest oxidation time and the lower leakage current is presented. (literal)
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