http://www.cnr.it/ontology/cnr/individuo/prodotto/ID4070

Impact of high-kappa gate stacks on transport and variability in nano-CMOS devices (Articolo in rivista)

Type

Label

Impact of high-kappa gate stacks on transport and variability in nano-CMOS devices (Articolo in rivista) (literal)

Anno

Alternative label

Watling, JR; Brown, AR; Ferrari, G; Barker, JR; Bersuker, G; Zeitzoff, P; Asenov, A (2008)
Impact of high-kappa gate stacks on transport and variability in nano-CMOS devices
in Journal of computational and theoretical nanoscience
(literal)

Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori

Watling, JR; Brown, AR; Ferrari, G; Barker, JR; Bersuker, G; Zeitzoff, P; Asenov, A (literal)

Pagina inizio

Pagina fine

Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume

Rivista

Note

Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni

\"[Watling, J. R.; Brown, A. R.; Barker, J. R.; Asenov, A.] Univ Glasgow, Dept Elect & Elect Engn, Device Modelling Grp, Glasgow G12 8LT, Lanark, Scotland; [Ferrari, G.] Univ Modena, INFM S, I-41100 Modena, Italy; [Ferrari, G.] Univ Modena, Dept Phys, I-41100 Modena, Italy; [Bersuker, G.] SEMATECH, Austin, TX 78741 USA; [Zeitzoff, P.] Freescale Semicond, Albany, NY 12203 USA (literal)

Titolo

Impact of high-kappa gate stacks on transport and variability in nano-CMOS devices (literal)

Abstract

Scaling of Si MOSFETs beyond the 90 nm technology node requires performance boosters in order to satisfy the International Technology Roadmap for Semiconductors (ITRS) requirements for drive current in high-performance transistors. Amongst the preferred near term solutions are transport enhanced FETs utilising strained Si (SSi) channels. Additionally, high-kappa dielectrics are expected to replace SiO2 around or after the 45 nm node to reduce the associated gate leakage current problem, facilitating further scaling. However, in spite of significant recent technological achievements, in particular, in reducing charge trapping and crystallization of the dielectric, mobility degradation in the devices with the high-kappa gate stacks caused, in part, by the strong soft optical phonon scattering leaves room for further performance improvement. In this work we study the impact of soft optical phonon scattering on the mobility and device performance for conventional and strained Si n-MOSFETs with high-kappa dielectrics using a self-consistent Poisson Ensemble Monte Carlo device simulator, with effective gate lengths of 67 and 35 nm. (literal)

Prodotto di