4H-SiC epitaxial layer growth by trichlorosilane (TCS) (Articolo in rivista)

Type
Label
  • 4H-SiC epitaxial layer growth by trichlorosilane (TCS) (Articolo in rivista) (literal)
Anno
  • 2008-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1016/j.jcrysgro.2008.10.041 (literal)
Alternative label
  • La Via F, Izzo G, Mauceri M, Pistone G, Condorelli G, Perdicaro L, Abbondanza G, Calcagno L, Foti G, Crippa D (2008)
    4H-SiC epitaxial layer growth by trichlorosilane (TCS)
    in Journal of crystal growth
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • La Via F, Izzo G, Mauceri M, Pistone G, Condorelli G, Perdicaro L, Abbondanza G, Calcagno L, Foti G, Crippa D (literal)
Pagina inizio
  • 107 (literal)
Pagina fine
  • 1 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 311 (literal)
Rivista
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#pagineTotali
  • 7 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroFascicolo
  • 1 (literal)
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • Izzo Gaetano, Calcagno Lucia, Foti Gaetano Dipartimento di Fisica Catania Mauceri Marco, Pistone Giuseppe, Condorelli Giuseppe, Perdicaro Laura, Abbondanza Giuseppe, Epitaxial Technology Center Catania Crippa Danilo LPE Bollate (Mi) (literal)
Titolo
  • 4H-SiC epitaxial layer growth by trichlorosilane (TCS) (literal)
Abstract
  • The growth rate of 4H-SiC epilayers has been increased up to 100 ?m/h with the use of trichlorosilane instead of silane as the silicon precursor. The epitaxial layers grown with this process have been characterized by electrical, optical and structural characterization methods. Schottky diodes, manufactured on the epitaxial layer grown with trichlorosilane at 1600 °C, have higher yield and lower defect density in comparison to diodes realized on epilayers grown with the standard epitaxial process. Both very low (<1013/cm3) and very high (~1019/cm3) doping levels have been reached with this process. The interface between very high and low doped regions is on the order of 30-50 nm. Very thick (>100 ?m) epitaxial layer has been grown and the Schottky diodes realized on these layers with a good yield (>87%). This process gives the opportunity to realize very high-power devices with breakdown voltages in the range of 10 kV with a low cost SiC epitaxy process. (literal)
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