Low-temperature polysilicon Thin Film Transistors on Polyimide substrates for electronics on plastic (Articolo in rivista)

Type
Label
  • Low-temperature polysilicon Thin Film Transistors on Polyimide substrates for electronics on plastic (Articolo in rivista) (literal)
Anno
  • 2008-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1016/j.sse.2007.10.041 (literal)
Alternative label
  • Pecora A; Maiolo L; Cuscunà M; Simeone D; Minotti A; Mariucci L; Fortunato G (2008)
    Low-temperature polysilicon Thin Film Transistors on Polyimide substrates for electronics on plastic
    in Solid-state electronics
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Pecora A; Maiolo L; Cuscunà M; Simeone D; Minotti A; Mariucci L; Fortunato G (literal)
Pagina inizio
  • 348 (literal)
Pagina fine
  • 352 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 52 (literal)
Rivista
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#pagineTotali
  • 5 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroFascicolo
  • 3 (literal)
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • Istituto di Fotonica e Nanotecnologie (IFN), CNR, via Cineto Romano, 42, 00156 Rome, Italy (literal)
Titolo
  • Low-temperature polysilicon Thin Film Transistors on Polyimide substrates for electronics on plastic (literal)
Abstract
  • In this work we show a new low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) fabrication process on polyimide (PI) layers. The PI is spun on Si-wafer used as rigid carrier, thus overcoming difficulties in handling flexible freestanding plastic substrates, eliminating the problem of plastic shrinkage with high temperature processing and allowing the use of standard semiconductor equipment. LTPS TFTs are fabricated according to a conventional non self-aligned process, with source/drain contacts formed by deposition of a highly doped Si-layer and patterned by a selective wet-etching. Laser annealing is performed providing simultaneous dopant activation and crystallization of the active layer. The maximum process temperature is kept below 350 °C. After LTPS TFTs fabrication, the PI layer is mechanically released from the rigid carrier, which can be re-used for a new fabrication process. The devices exhibit good electrical characteristics with field effect mobility up to 50 cm2/V s. Analysis of electrical stability and characteristics in presence of mechanical stress is also shown. (literal)
Prodotto di
Autore CNR
Insieme di parole chiave

Incoming links:


Autore CNR di
Prodotto
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#rivistaDi
Insieme di parole chiave di
data.CNR.it