http://www.cnr.it/ontology/cnr/individuo/prodotto/ID35133
Nanocrystal metal-oxide-semiconductor memories obtained by chemical vapor deposition of Si nanocrystals (Articolo in rivista)
- Type
- Label
- Nanocrystal metal-oxide-semiconductor memories obtained by chemical vapor deposition of Si nanocrystals (Articolo in rivista) (literal)
- Anno
- 2002-01-01T00:00:00+01:00 (literal)
- Alternative label
Ammendola, G.a, Vulpio, M.a, Bileci, M.a, Nastasi, N.a, Gerardi, C.a, Renna, G.b, Crupi, I.c, Nicotra, G.c, Lombardo, S.c (2002)
Nanocrystal metal-oxide-semiconductor memories obtained by chemical vapor deposition of Si nanocrystals
in Journal of vacuum science & technology. B, Microelectronics and nanometer structures
(literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
- Ammendola, G.a, Vulpio, M.a, Bileci, M.a, Nastasi, N.a, Gerardi, C.a, Renna, G.b, Crupi, I.c, Nicotra, G.c, Lombardo, S.c (literal)
- Pagina inizio
- Pagina fine
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- Rivista
- Note
- ISI Web of Science (WOS) (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
- a Central RandD, STMicroelectronics, Stradale Primosole 50, 95121 Catania, Italy
b Central Front-End Manufacturing, STMicroelectronics, Stradale Primosole 50, 95121 Catania, Italy
c CNR-IMETEM, Stradale Primosole 50, 95121 Catania, Italy (literal)
- Titolo
- Nanocrystal metal-oxide-semiconductor memories obtained by chemical vapor deposition of Si nanocrystals (literal)
- Abstract
- We have realized nanocrystal memories by using silicon quantum dots
embedded in silicon dioxide. The Si dots with the size of few nanometers
have been obtained by chemical vapor deposition on very thin tunnel oxides
and subsequently coated with a deposited SiO2 control dielectric. A range
of temperatures in which we can adequately control a nucleation process,
that gives rise to nanocrystal densities of ~3×1011 cm2 with good
uniformity on the wafer, has been defined. The memory effects are observed
in metal-oxide-semiconductor capacitors or field effect transistors by
significant and reversible flat band or threshold voltage shifts between
written and erased states that can be achieved by applying gate voltages as
low as 5 V. The program-erase window does not exhibit any change after 105
cycles on large area cells showing that the endurance of such a memory
device which uses a thinner tunnel oxide is potentially much higher than
that of standard nonvolatile memories. Moreover, good retention results are
observed in spite of the low tunnel dielectric thickness. (literal)
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