Few electron limit of n-type metal oxide semiconductor single electron transistors (Articolo in rivista)

Type
Label
  • Few electron limit of n-type metal oxide semiconductor single electron transistors (Articolo in rivista) (literal)
Anno
  • 2012-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1088/0957-4484/23/21/215204 (literal)
Alternative label
  • Prati E, De Michielis M, Belli M, Cocco S, Fanciulli M, Kotekar-Patil D, Ruoff M, Kern Dieter P, Wharam DA, Verduijn J, Tettamanzi GC, Rogge S, Roche B, Wacquez R, Jehl X, Vinet M, Sanquer M (2012)
    Few electron limit of n-type metal oxide semiconductor single electron transistors
    in Nanotechnology (Bristol. Print)
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Prati E, De Michielis M, Belli M, Cocco S, Fanciulli M, Kotekar-Patil D, Ruoff M, Kern Dieter P, Wharam DA, Verduijn J, Tettamanzi GC, Rogge S, Roche B, Wacquez R, Jehl X, Vinet M, Sanquer M (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 20 (literal)
Rivista
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroFascicolo
  • 21 (literal)
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • [ 1 ] CNR IMM, Lab MDM, I-20864 Agrate Brianza, Italy [ 2 ] Univ Milano Bicocca, Dipartimento Sci Mat, I-20125 Milan, Italy [ 3 ] Univ Tubingen, Inst Appl Phys, D-72076 Tubingen, Germany [ 4 ] Delft Univ Technol, Kavli Inst Nanosci, NL-2628 CJ Delft, Netherlands [ 5 ] Univ New S Wales, Ctr Quantum Computat & Commun Technol, Sch Phys, Sydney, NSW 2052, Australia [ 6 ] CEA, Serv Phys Stat Magnetisme & Supraconductivite, Inst Nanosci & Cryogenie, F-38054 Grenoble, France [ 7 ] Univ Grenoble 1, F-38054 Grenoble, France [ 8 ] CEA LETI, F-38054 Grenoble 9, France (literal)
Titolo
  • Few electron limit of n-type metal oxide semiconductor single electron transistors (literal)
Abstract
  • We report the electronic transport on n-type silicon single electron transistors (SETs) fabricated in complementary metal oxide semiconductor (CMOS) technology. The n-type metal oxide silicon SETs (n-MOSSETs) are built within a pre-industrial fully depleted silicon on insulator (FDSOI) technology with a silicon thickness down to 10 nm on 200 mm wafers. The nominal channel size of 20 x 20 nm(2) is obtained by employing electron beam lithography for active and gate level patterning. The Coulomb blockade stability diagram is precisely resolved at 4.2 K and it exhibits large addition energies of tens of meV. The confinement of the electrons in the quantum dot has been modeled by using a current spin density functional theory (CS-DFT) method. CMOS technology enables massive production of SETs for ultimate nanoelectronic and quantum variable based devices. (literal)
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