http://www.cnr.it/ontology/cnr/individuo/prodotto/ID251961
On the implementation of quadraphonic recording (Contributo in atti di convegno)
- Type
- Label
- On the implementation of quadraphonic recording (Contributo in atti di convegno) (literal)
- Anno
- 2005-01-01T00:00:00+01:00 (literal)
- Alternative label
N.E. LInsalata (1), L. Fanucci (1,2), D. Bonsi (3), D. Stanzial (3) (2005)
On the implementation of quadraphonic recording
in Forum Acusticum 2005, Budapest, Hungary, 29 Aug - 2 Sep 2005
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- N.E. LInsalata (1), L. Fanucci (1,2), D. Bonsi (3), D. Stanzial (3) (literal)
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- The present research has been supported by EU projects RACINE-S and IP-RACINE respectively under contracts IST-2001-37117 and IST-2-511316-IP. (literal)
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- Proceedings of Forum Acusticum 2005 Budapest (literal)
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- (1) Dept. of Information Engineering, University of Pisa - Via Caruso, I-56122 Pisa, Italy
(2) IEIIT - National Research Council - Via Caruso, I-56122 Pisa, Italy
(3) The Musical and Architectural Acoustics Laboratory - FSSG-CNR c/o Fondazione G. Cini - Isola di San Giorgio Maggiore, I-30124 Venezia - Italy (literal)
- Titolo
- On the implementation of quadraphonic recording (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#isbn
- Abstract
- A recent patent in the acoustics field introduced a new approach to quadraphonic data recording and playback.
Based on fixed objective criteria, this method seems a promising technique to be used in high-fidelity
systems where a characterization of the recording environment is needed. This may be useful for instance
when documenting \"sound events\" such as music performances in real acoustic spaces or when composing
virtual acoustic environments as for cinema sound tracks. A major bottleneck for real-time application of
this system is represented by the physical implementation, which has to cope both with feasible implementation
and no detriment to the high-end performances offered by the quadraphonic technique. This
paper presents the architectural design issues for implementation of the quadraphonic recording algorithm:
after the algorithm profiling, the hardware/software architecture is derived as a trade-off between complexity,
performance and flexibility among different target technologies ranging from Digital Signal Processor
(DSP) throughApplication Specific Instruction set Processor (ASIP) up to Field ProgrammableGate Arrays
(FPGA) and Application Specific Integrated Circuit (ASIC). As a conclusion, preliminary implementation
results for the most promising technology will be provided. (literal)
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