http://www.cnr.it/ontology/cnr/individuo/prodotto/ID24936

Low-temperature electron cyclotron resonance plasma-enhanced chemical-vapor deposition silicon dioxide as gate insulator for polycrystalline silicon thin-film transistors (Articolo in rivista)

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Low-temperature electron cyclotron resonance plasma-enhanced chemical-vapor deposition silicon dioxide as gate insulator for polycrystalline silicon thin-film transistors (Articolo in rivista) (literal)

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L. Maiolo; A. Pecora; G. Fortunato; N. D. Young (2006)
Low-temperature electron cyclotron resonance plasma-enhanced chemical-vapor deposition silicon dioxide as gate insulator for polycrystalline silicon thin-film transistors
in Journal of vacuum science & technology. A. Vacuum, surfaces, and films
(literal)

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Instituto di Fotonica e Nanotecnologie (IFN), CNR, Via Cineto Romano 42, 00156 Rome, Italy (literal)

Titolo

Low-temperature electron cyclotron resonance plasma-enhanced chemical-vapor deposition silicon dioxide as gate insulator for polycrystalline silicon thin-film transistors (literal)

Abstract

Silicon dioxide films have been deposited at temperatures below 270 degrees C in an electron cyclotron resonance (ECR) plasma reactor from O-2, SiH4, and He gas mixture. Pinhole density analysis as a function of substrate temperature for different microwave powers was carried out. Films deposited at higher microwave power and at room temperature show defect densities (< 7 pinhole/mm(2)), ensuring low-temperature process integration on large area. From Fourier transform infrared analysis and thermal desorption spectrometry we also evaluated very low hydrogen content if compared to conventional rf-plasma-enhanced chemical-vapor-deposited (PECVD) SiO2 deposited at 350 degrees C. Electrical properties have been measured in metal-oxide-semiconductor (MOS) capacitors, depositing SiO2 at RT as gate dielectric; breakdown electric fields > 10 MV/cm and charge trapping at fields > 6 MV/cm have been evaluated. From the study of interface quality in MOS capacitors, we found that even for low annealing temperature (200 degrees C), it is possible to considerably reduce the interface state density down to 5 x 10(11) cm(-2) eV(-1). To fully validate the ECR-PECVD silicon dioxide we fabricated polycrystalline silicon thin-film transistors using RT-deposited SiO2 as gate insulator. Different postdeposition thermal treatments have been studied and good device characteristics were obtained even for annealing temperature as low as 200 degrees C. (literal)

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