Characterization of a fabrication process for the integration of superconducting qubits and rapid-single-flux-quantum circuits (Articolo in rivista)

Type
Label
  • Characterization of a fabrication process for the integration of superconducting qubits and rapid-single-flux-quantum circuits (Articolo in rivista) (literal)
Anno
  • 2006-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1088/0953-2048/19/8/030 (literal)
Alternative label
  • M. G. Castellano; L. Grönberg; P. Carelli; F. Chiarello; C. Cosmelli; R. Leoni; S. Poletto; G. Torrioli; J. Hassel; P. Helistö (2006)
    Characterization of a fabrication process for the integration of superconducting qubits and rapid-single-flux-quantum circuits
    in Superconductor science and technology (Print)
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • M. G. Castellano; L. Grönberg; P. Carelli; F. Chiarello; C. Cosmelli; R. Leoni; S. Poletto; G. Torrioli; J. Hassel; P. Helistö (literal)
Pagina inizio
  • 860 (literal)
Pagina fine
  • 864 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 19 (literal)
Rivista
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroFascicolo
  • 8 (literal)
Note
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • 1. CNR, Ist Foton & Nanoelect, I-00156 Rome, Italy 2. VTT, Espoo 02044, Finland 3. Univ Aquila, Dipartimento Energet, I-67040 Laquila, Italy 4. Univ Roma La Sapienza, Dipartimento Fis, I-00185 Rome, Italy 5. Univ Roma 3, Dipartimento Fis, I-00146 Rome, Italy (literal)
Titolo
  • Characterization of a fabrication process for the integration of superconducting qubits and rapid-single-flux-quantum circuits (literal)
Abstract
  • In order to integrate superconducting qubits with rapid-single-flux-quantum (RSFQ) control circuitry, it is necessary to develop a fabrication process that fulfills at the same time the requirements of both elements: low critical current density, very low operating temperature (tens of milliKelvin) and reduced dissipation on the qubit side; high operation frequency, large stability margins, low dissipated power on the RSFQ side. For this purpose, VTT has developed a fabrication process based on Nb trilayer technology, which allows the on-chip integration of superconducting qubits and RSFQ circuits even at very low temperature. Here we present the characterization (at 4.2 K) of the process from the point of view of the Josephson devices and show that they are suitable to build integrated superconducting qubits. (literal)
Prodotto di
Autore CNR

Incoming links:


Prodotto
Autore CNR di
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#rivistaDi
data.CNR.it