http://www.cnr.it/ontology/cnr/individuo/prodotto/ID233810
DETRIMENTAL IMPACT OF TECHNOLOGICAL PROCESSES ON BTI RELIABILITY OF ADVANCED HIGH-K/METAL GATE STACKS (Contributo in atti di convegno)
- Type
- Label
- DETRIMENTAL IMPACT OF TECHNOLOGICAL PROCESSES ON BTI RELIABILITY OF ADVANCED HIGH-K/METAL GATE STACKS (Contributo in atti di convegno) (literal)
- Anno
- 2009-01-01T00:00:00+01:00 (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
- 10.1109/IRPS.2009.5173279 (literal)
- Alternative label
Garros, X ; Casse, M ; Fenouillet-Beranger, C ; Reimbold, G ; Martin, F ; Gaumer, C ; Wiemer, C ; Perego, M; Boulanger, F (2009)
DETRIMENTAL IMPACT OF TECHNOLOGICAL PROCESSES ON BTI RELIABILITY OF ADVANCED HIGH-K/METAL GATE STACKS
in 47th Annual IEEE International Reliability Physics Symposium, Monreal, APR 26-30, 2009
(literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
- Garros, X ; Casse, M ; Fenouillet-Beranger, C ; Reimbold, G ; Martin, F ; Gaumer, C ; Wiemer, C ; Perego, M; Boulanger, F (literal)
- Pagina inizio
- Pagina fine
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#titoloVolume
- 2009 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM, VOLS 1 AND 2 (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
- STMicroelectronics, F-38926 Crolles, France
MINATEC, CEA, LETI, F-38054 Grenoble, France
CNR, INFM, Lab Nazl MDM, I-20041 Agrate Brianza, MI, Italy (literal)
- Titolo
- DETRIMENTAL IMPACT OF TECHNOLOGICAL PROCESSES ON BTI RELIABILITY OF ADVANCED HIGH-K/METAL GATE STACKS (literal)
- Abstract
- A systematic study of mobility performances and Bias Temperature Instability (BTI) reliability was done on a large variety of advanced dielectric stacks. We clearly demonstrate that mobility performances and NBTI reliability are strongly correlated and that they are affected by the diffusion of nitrogen species N at the Si interface. Reducing the metal gate thickness favors the reduction of mobility degradations and NBTI, but, also strongly enhances PBTI, due to a complex set of reactions in the gate oxide. An optimum gate thickness must be found to obtain an acceptable trade off between device performance and reliability requirements. (literal)
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