Investigation of silicon nanowire breakdown properties for the realization of one-time programmable memories (Articolo in rivista)

Type
Label
  • Investigation of silicon nanowire breakdown properties for the realization of one-time programmable memories (Articolo in rivista) (literal)
Anno
  • 2011-01-01T00:00:00+01:00 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
  • 10.1016/j.mee.2010.12.008 (literal)
Alternative label
  • Massimo Totaro; Giovanni Pennelli; Massimo Piotto (2011)
    Investigation of silicon nanowire breakdown properties for the realization of one-time programmable memories
    in Microelectronic engineering; North Holland Pub. Co., Amsterdam (Paesi Bassi)
    (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
  • Massimo Totaro; Giovanni Pennelli; Massimo Piotto (literal)
Pagina inizio
  • 2413 (literal)
Pagina fine
  • 2416 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroVolume
  • 88 (literal)
Rivista
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#note
  • (ISSN 0167-9317) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#pagineTotali
  • 4 (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#numeroFascicolo
  • 8 (literal)
Note
  • Scopu (literal)
  • ISI Web of Science (WOS) (literal)
Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
  • Dipartimento di Ingegneria della Informazione, Università di Pisa, Via G. Caruso, I-56122 Pisa, Italy Dipartimento di Ingegneria della Informazione, Università di Pisa, Via G. Caruso, I-56122 Pisa, Italy IEIIT-PISA, CNR, Via G. Caruso 16, 56122 Pisa, Italy (literal)
Titolo
  • Investigation of silicon nanowire breakdown properties for the realization of one-time programmable memories (literal)
Abstract
  • In this work the breakdown properties of silicon nanowires fabricated with a top-down approach are investigated. The breaking voltages and currents of devices based on suspended silicon nanowires with different cross-section widths have been determined. It has been found that devices can be fused using a bias current in the range of 20 lA for sufficiently thin nanowires. In this way a device based on a single nanowire can be used for the fabrication of a fully CMOS-compatible one-time programmable (OTP) memory cell, where the wire conductance distinguishes the ON/OFF states. In the normal operation mode (ON state) the dissipated power can be very low. The solution seems to be promising in terms of scalability and low power consumption, which is a key factor in portable systems. (literal)
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