http://www.cnr.it/ontology/cnr/individuo/prodotto/ID167724
Low-temperature annealing combined with laser crystallization for polycrystalline silicon TFTs on polymeric substrate (Articolo in rivista)
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- Low-temperature annealing combined with laser crystallization for polycrystalline silicon TFTs on polymeric substrate (Articolo in rivista) (literal)
- Anno
- 2008-01-01T00:00:00+01:00 (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#doi
- 10.1149/1.2965734 (literal)
- Alternative label
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#autori
- Privitera V; Scalese S; La Magna A; Pecora A; Cuscuna M; Maiolo L; Minotti A; Simeone D; Mariucci L; Fortunato G; Caristia L; Mangano F; Di Marco S; Camalleri M; Ravesi S; Coffa S; Grimaldi MG; De Bastiani R; Badala P; Bagiante S (literal)
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- ISI Web of Science (WOS) (literal)
- Http://www.cnr.it/ontology/cnr/pubblicazioni.owl#affiliazioni
- [Privitera, V.; Scalese, S.; La Magna, A.] CNR IMM, I-95121 Catania, Italy; [Pecora, A.; Cuscuna, M.; Maiolo, L.; Minotti, A.; Simeone, D.; Mariucci, L.; Fortunato, G.] CNR IMM, I-00133 Rome, Italy; [Caristia, L.; Mangano, F.; Di Marco, S.; Camalleri, M.; Ravesi, S.; Coffa, S.] ST Microelect, I-95121 Catania, Italy; [Grimaldi, M. G.; De Bastiani, R.; Badala, P.; Bagiante, S.] Univ Catania, Dipartimento Fis & Astron, I-95123 Catania, Italy; [Grimaldi, M. G.; De Bastiani, R.; Badala, P.; Bagiante, S.] CNR INFM Matis, I-95123 Catania, Italy (literal)
- Titolo
- Low-temperature annealing combined with laser crystallization for polycrystalline silicon TFTs on polymeric substrate (literal)
- Abstract
- The formation of polycrystalline Si layers on flexible plastic substrates, through plasma enhanced chemical vapor deposition and excimer laser annealing, is investigated. Combining low-temperature (300 degrees C) annealing with laser dehydrogenation/crystallization produces good-quality polycrystalline silicon with a reduced shot density. By using optimal crystallization conditions it is possible to achieve a superlateral growth crystallization regime, with a grain size up to 1 mu m, and void-free material, as confirmed by the presented structural analysis. The beneficial effect of the low-temperature thermal annealing has been related to the removal of nonbound hydrogen, as supported by the elastic recoil detection analysis and IR analysis of the samples. To validate the process, we fabricated non-self-aligned polysilicon thin-film transistors (TFTs) directly on spin-coated polyimide substrates, with a maximum processing temperature of 300 degrees C and with a relatively low shot density (< 10 shots/point). The TFTs presented good electrical characteristics with an on/off ratio > 10(6), a field-effect mobility up to 65 cm(2)/V s, and a threshold voltage of 7 V. These results confirmed that the developed crystallization process is suitable to fabricate polysilicon TFTs on polymeric substrates, allowing an increased process throughput. (literal)
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